Happy Thirteenth Birthday IBIS - Guest Post from Michael Mirmak

(Syndicated content from http://signal-integrity-tips.com/2008/happy-thirteenth-birthday-ibis-guest-post-from-michael-mirmak/)

Signal Integrity Tips continues our mini-celebration of the anniversary of IBIS 2.1 ANSI/EIA-656 with this guest post from Michael Mirmak, Chair, IBIS Open Forum. Michael writes:

The year 1995 was certainly one of firsts and achievements. NASDAQ crossed the 1000 mark for the first time. Microsoft released Windows 95. eBay and Yahoo! were founded. The first planet outside our solar system was discovered. And, as Colin kindly noted, IBIS 2.1 was formally approved as a US national standard, ANSI/EIA-656 on December 13th, 1995.

IBIS, the I/O Buffer Information Specification, was by then already a "toddler," as version 1.0 had been released to the public in June, 1993. It was the answer to a strong industry desire for a non-proprietary behavioral format for buffer signal integrity data that could be shared between EDA tools, system designers and IC vendors alike.

Version 2.1 was revolutionary, with the size of the specification almost tripling due to the added features. The simple ramps used to represent buffer transitions were supplemented with tables of voltage-versus-time data. Support for differential pins, as well as ECL buffer types, was included. Matrix-based package models were added, allowing both true pin- and pad-based analysis using a single buffer model. As a national standard and a practical approach, IBIS 2.1 defined a basic structure which has remained useful ever since.

Much has happened over the intervening 13 years. IBIS 3.2 and 4.0 defined new measurement thresholds, added driver scheduling, improved package support and even created a board description format. IBIS 4.1 and 4.2 brought IBIS together with the analog/mixed-signal world, allowing Verilog-AMS and VHDL-AMS code, as well as Berkeley SPICE elements, to be integrated into the IBIS structure. Now, with the approval of IBIS 5.0 in August of this year, combined power delivery and signal integrity modeling using the simple table-driven IBIS approach becomes a reality. And with the addition of the Algorithmic Modeling Interface (AMI), the specification expands to cover advanced serial-differential equalizer behaviors.

Not a bad list of accomplishments for a teenager.

Happy birthday, IBIS and thanks to its many contributors and users over the years.

- Michael Mirmak

Chair, IBIS Open Forum

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Happy Thirteenth Birthday IBIS

(Syndicated content from http://signal-integrity-tips.com/2008/happy-thirteenth-birthday-ibis/)

After a gestation of several years, the Input/Output Buffer Information Specification (IBIS) Version 2.1 was formally ratified as ANSI/EIA-656 on December 13, 1995: IBIS turns thirteen tomorrow.

The IBIS behavioral modeling template emerged as a compromise between the need of chip vendors to protect the intellectual property in their SPICE netlists, and the need chip consumers to have an "executable datasheet" of the I/O buffers they design into their systems.

Here's a snippet from the IBIS home page.

Introduction: IBIS is a standard for electronic behavioral specifications of integrated circuit input/output analog characteristics.

Group Objectives: In order to enable an industry standard method to electronically transport IBIS modeling data between silicon vendors, simulation software vendors, and end customers, this template is proposed. The intention of this template is to specify a consistent format that can be parsed by software, allowing simulation vendors to derive models compatible with their own products.

There are mainy excellent IBIS resources on the web including IBIS Modeling Cookbook (Senior editor: Michael Mirmak)

For a look at how our tool, Agilent ADS, uses the IBIS templates, check out this post entitled Workflow with IBIS Models.

And Happy Birthday, IBIS, from Signal Integrity Tips blog!

MP3 Podcast version of this post

Day in the Life of an Agilent EEsof EDA Chiphead

(Syndicated synopsis of original blog post at http://signal-integrity-tips.com/2008/day-in-the-life-of-an-agilent-eesof-eda-chiphead/)

My entry to the DesignCon® 2009 Video Contest is entitled "Day in the Life of an Agilent EEsof EDA Chiphead®". Learn all about the upcoming ISO 1984 standard in this (hopefully) hilarious parody of a famous series of YouTube videos.

For details on how to enter your own video, go to the Chiphead® Video Contest

iTunes Version of Day In The Life Of an Agilent EEsof EDA Chiphead

What Social Media Web Sites Do Signal Integrity Engineers Use?

(Synopsis: Original blog post is at http://signal-integrity-tips.com/2008/what-social-media-web-sites-do-signal-integrity-engineers-use/)

Social media can be broadly defined "as a groups of people conversing and exchanging information online."

Signal integrity engineers started using social media -- also known as Web 2.0 -- long before it was ever called by those names: the signal integrity e-mail reflector ("si-list") fits the definition.

Ray Anderson, the founder of si-list, kindly let me post his history of the si-list:

I believe that si-list went "on the air" around May 15, 1994.

There was a short course on "Electrical Modeling, Simulation and Design of Electronic Packages" that was taught by Raj Mittra, Paul Franzon and Jose Schutt-Aine in San Jose, CA on May 9-12, 1994. During the last day of class we passed around a blank piece of paper collecting e-mail addresses from anyone who wanted to be included in a proposed signal integrity email list. When I returned to my office at Sun Microsystems the following Monday I put together the initial si-list with about 30 subscribers from the previous weeks short course. Now, about 14.5 years later we have somewhere around 3500-4000 subscribers.

So the si-list even predates that milestone moment of "Web 1.0": the IPO of Netscape on August 9, 1995.

But besides the si-list, which other social media sites do you and your colleagues use for work and pleasure? Take this fun, quick, informal, unscientific poll and get instant gratification of seeing the tally so far.

[poll id="22"]
[poll id="25"]
[poll id="21"]
[poll id="24"]
[poll id="20"]
[poll id="23"]

If you use site that is not listed below, please also leave a comment by clicking the link in this post. Also please add a comment if you have thoughts about this topic.

If you want more information on social media take a look at Social Media Overview by Gregory Go on About.com or the Wikipedia article on social media.

MP3 podcast of this post, What Social Media Web Sites Do Signal Integrity Engineers Use?.

What Social Media Web Sites Do Signal Integrity Engineers Use?

(Synopsis: Original blog post is at http://signal-integrity-tips.com/2008/what-social-media-web-sites-do-signal-integrity-engineers-use/)

Social media can be broadly defined "as a groups of people conversing and exchanging information online."

Signal integrity engineers started using social media -- also known as Web 2.0 -- long before it was ever called by those names: the signal integrity e-mail reflector ("si-list") fits the definition.

Ray Anderson, the founder of si-list, kindly let me post his history of the si-list:

I believe that si-list went "on the air" around May 15, 1994.

There was a short course on "Electrical Modeling, Simulation and Design of Electronic Packages" that was taught by Raj Mittra, Paul Franzon and Jose Schutt-Aine in San Jose, CA on May 9-12, 1994. During the last day of class we passed around a blank piece of paper collecting e-mail addresses from anyone who wanted to be included in a proposed SI mail list. When I returned to my office at Sun Microsystems the following Monday I put together the initial si-list with about 30 subscribers from the previous weeks short course. Now, about 14.5 years later we have somewhere around 3500-4000 subscribers.

So the si-list even predates that milestone moment of "Web 1.0": the IPO of Netscape on August 9, 1995.

But besides the si-list, which other social media sites do you and your colleagues use for work and pleasure? Take this fun, quick, informal, unscientific poll and get instant gratification of seeing the tally so far.

[poll id="22"]
[poll id="25"]
[poll id="21"]
[poll id="24"]
[poll id="20"]
[poll id="23"]

If you use site that is not listed below, please also leave a comment by clicking the link in this post. Also please add a comment if you have thoughts about this topic.

If you want more information on social media take a look at Social Media Overview by Gregory Go on About.com or the Wikipedia articel of social media.

Ten Habits Of Highly Successful High Speed Serial Link Designers

(My Original Blog Post: http://signal-integrity-tips.com/2008/ten-habits-of-highly-successful-high-speed-serial-link-designers/)

Guest post by Eric Bogatin, signal integrity evangelist.

We microwave minute-rice to cook it faster. We get our news from the one liners of late night talk show comedians. In this perspective, I gave a talk -- as a distinguished lecturer for the IEEE EMC society -- on "Ten Habits of Highly Successful Board Designers." Everyone is welcome to download a full copy of my presentation. Colin invited me to post this summary here. If you get your philosophy of life from bumper stickers, then you’ll want to design your boards based on these ten rules, presented for your entertainment:

1. Use as low a differential impedance as you can get away with.


2. Keep the differential impedance of signal lines constant by adjusting line width when the coupling changes.


3. Use tightly coupled differential pairs when interconnect density is critical, use loosely coupled differential pairs when loss is over riding.


4. Keep the length skew between the lines in a pair less than 60 mils/(bit rate in Gbps)


5. When possible, route the signal lines off axis from the glass weave.


6. Minimize the discontinuity of DC blocking capacitors by using the minimum size capacitor pads and use cut outs in the nearest ground plane when the pad width is larger than the surface trace width.


7. Keep the length of via stubs, in mils, as short as possible, and no longer than 300 mils/(bit rate in Gbps).


8. Increase the impedance of vias by removing NFPs (non-functional pads on intermediate layers) and use as wide a clearance hole as you can get away with.


9. Use a return via adjacent to all differential signal vias.


10. Use pre- or de- emphasis on TX and equalization on the RX.


11. Bonus pointer: Ask your fab vendor for smoother copper.

Visit Eric’s blog by clicking here.

Ten Habits Of Highly Successful High Speed Serial Link Designers - MP3 version.

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